1. Field of the Invention
The present invention relates to a Peripheral Component Interconnect (PCI) system. More particularly, the present invention relates to methods and apparatus that are adapted for controlling power distribution of a front card connected with a PCI backplane.
2. Description of Related Art
Compact Peripheral Component Interconnect (CPCI) is a high performance industrial bus based on the standard PCI electrical specification in rugged 3U or 6U Eurocard packaging. CPCI is intended for application in telecommunications, computer telephony, real-time machine control, industrial automation, real-time data acquisition, instrumentation, military systems or any other application requiring high speed computing, modular and robust packaging design, and long term manufacturer support. Because of its high speed and bandwidth, the CPCI bus is particularly well suited for many high-speed data communication applications such as servers, routers, and switches.
Compared to a standard desktop PCI, CPCI supports twice as many PCI slots (typically 8 versus 4) and offers an ideal packaging scheme for industrial applications. Conventional CPCI cards are designed for front loading and removal from a card cage. The cards are firmly held in position by their connector, card guides on both sides, and a faceplate that solidly screws into the card cage. Cards are mounted vertically allowing for natural or forced air convection for cooling. Also, the pin-and-socket connector of the CPCI card is significantly more reliable and has better shock and vibration characteristics than the card edge connector of the standard PCI cards.
Conventional CPCI defines a CPCI backplane that is typically limited to eight slots. More specifically, the bus segment of the conventional CPCI system is limited to eight slots in which front cards (e.g., motherboards) and mating transition cards are installed. Typically, the front card provides substantially all features and functions (i.e., clocking, arbitration, configuration, and interrupt processing) of the CPCI system and the transition card allows access to these features and functions by providing ports, such as Small Computer System Interface (SCSI) ports.
In general, as technology of the CPCI products evolve and change, a front card may feature a number of voltage rails (e.g., +12V, −12V, 3.3V, 5V, 1.8V) that require strictly controlled sequencing upon insertion or extraction of the front card from the CPCI system. For example, a central processing unit (CPU) for a front card may require that its core voltage (e.g., the 1.8V used to power the logics within the CPU) be made available before Input/Output (I/O) voltage (e.g., the 3.3V used to power the input/output interfaces of the CPU). Specifically, problems arise when the power sequence requirements change or deviate from what the standard(s) provide.
Accordingly, it would be desirable to provide a CPCI system that is adapted to provide for methods and apparatus that can change power sequences during a front card's lifetime in a cost effective manner (e.g., without having to modify the front card's hardware which can become quite costly).